Datasheet

PIC18F87K22 FAMILY
DS39960D-page 188 2009-2011 Microchip Technology Inc.
TABLE 12-17: PORTJ FUNCTIONS
TABLE 12-18: SUMMARY OF REGISTERS ASSOCIATED WITH PORTJ
Pin Name Function
TRIS
Setting
I/O
I/O
Type
Description
RJ0/ALE RJ0 0 O DIG LATJ<0> data output.
1 I ST PORTJ<0> data input.
ALE
x O DIG External memory interface address latch enable control output; takes
priority over digital I/O.
RJ1/OE
RJ1 0 O DIG LATJ<1> data output.
1 I ST PORTJ<1> data input.
OE
x O DIG External memory interface output enable control output; takes priority
over digital I/O.
RJ2/WRL
RJ2 0 O DIG LATJ<2> data output.
1 I ST PORTJ<2> data input.
WRL
x O DIG External Memory Bus write low byte control; takes priority over
digital I/O.
RJ3/WRH
RJ3 0 O DIG LATJ<3> data output.
1 I ST PORTJ<3> data input.
WRH
x O DIG External memory interface write high-byte control; takes priority over
digital I/O.
RJ4/BA0 RJ4 0 O DIG LATJ<4> data output.
1 I ST PORTJ<4> data input.
BA0 x O DIG External Memory Interface Byte Address 0 control output; takes
priority over digital I/O.
RJ5/CE
RJ5 0 O DIG LATJ<5> data output.
1 I ST PORTJ<5> data input.
CE
x O DIG External memory interface chip enable control output; takes priority
over digital I/O.
RJ6/LB
RJ6 0 O DIG LATJ<6> data output.
1 I ST PORTJ<6> data input.
LB
x O DIG External memory interface lower byte enable control output; takes
priority over digital I/O.
RJ7/UB
RJ7 0 O DIG LATJ<7> data output.
1 I ST PORTJ<7> data input.
UB
x O DIG External memory interface upper byte enable control output; takes
priority over digital I/O.
Legend: O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
PORTJ
(1)
RJ7 RJ6 RJ5 RJ4 RJ3 RJ2 RJ1 RJ0
LATJ
(1)
LATJ7 LATJ6 LATJ5 LATJ4 LATJ3 LATJ2 LATJ1 LATJ0
TRISJ
(1)
TRISJ7 TRISJ6 TRISJ5 TRISJ4 TRISJ3 TRISJ2 TRISJ1 TRISJ0
PADCFG1 RDPU REPU RJPU
(1)
RTSECSEL1 RTSECSEL0
Legend: Shaded cells are not used by PORTJ.
Note 1: Unimplemented on 64-pin devices (PIC18F6XK22), read as0’.