Datasheet

PIC18F87K22 FAMILY
DS39960D-page 168  2009-2011 Microchip Technology Inc.
REGISTER 12-3: ODCON2: PERIPHERAL OPEN-DRAIN CONTROL REGISTER 2
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CCP10OD
(1)
CCP9OD
(1)
CCP8OD CCP7OD CCP6OD CCP5OD CCP4OD CCP3OD
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 CCP10OD: CCP10 Open-Drain Output Enable bit
(1)
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 6 CCP9OD: CCP9 Open-Drain Output Enable bit
(1)
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 5 CCP8OD: CCP8 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 4 CCP7OD: CCP7 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 3 CCP6OD: CCP6 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 2 CCP5OD: CCP5 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 1 CCP4OD: CCP4 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
bit 0 CCP3OD: ECCP3 Open-Drain Output Enable bit
1 = Open-drain capability is enabled
0 = Open-drain capability is disabled
Note 1: Not implemented on devices with 32-byte program memory (PIC18FX5K22).