Datasheet

 2009-2011 Microchip Technology Inc. DS39960D-page 161
PIC18F87K22 FAMILY
REGISTER 11-21: IPR6: PERIPHERAL INTERRUPT PRIORITY REGISTER 6
U-0 U-0 U-0 R/W-1 U-0 R/W-1 R/W-1 R/W-1
— — — EEIP — CMP3IP CMP2IP CMP1IP
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-5 Unimplemented: Read as ‘0’
bit 4 EEIP: EE Interrupt Priority bit
1 =High priority
0 = Low priority
bit 3 Unimplemented: Read as ‘0’
bit 2 CMP3IP: CMP3 Interrupt Priority bit
1 =High priority
0 = Low priority
bit 1 CMP2IP: CMP2 Interrupt Priority bit
1 =High priority
0 = Low priority
bit 0 CMP1IP: CMP1 Interrupt Priority bit
1 =High priority
0 = Low priority