Datasheet

 2009-2011 Microchip Technology Inc. DS39960D-page 153
PIC18F87K22 FAMILY
REGISTER 11-11: PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
OSCFIE
— SSP2IE BCL2IE BCL1IE HLVDIE TMR3IE TMR3GIE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 OSCFIE: Oscillator Fail Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 6 Unimplemented: Read as ‘0’
bit 5 SSP2IE: Master Synchronous Serial Port 2 Interrupt Enable bit
1 = Enables the MSSP interrupt
0 = Disables the MSSP interrupt
bit 4 BCL2IE: Bus Collision Interrupt Enable bit
1 = Enables the bus collision interrupt
0 = Disables the bus collision interrupt
bit 3 BCL1IE: Bus Collision Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 2 HLVDIE: High/Low-Voltage Detect Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 1 TMR3IE: TMR3 Overflow Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 0 TMR3GIE: Timer3 Gate Interrupt Enable bit
1 = Enabled
0 = Disabled