Information

PIC18F87K22 FAMILY
DS80000507F-page 2  2010-2013 Microchip Technology Inc.
TABLE 2: SILICON ISSUE SUMMARY
Module Feature
Item
Number
Issue Summary
Affected Revisions
(1)
A3 B1 B3 C1 C3
Analog-to-Digital
Converter (A/D)
A/D Offset 1.1
The A/D offset is greater than specified in
the data sheet’s A/D Converter
Characteristics table.
X
Analog-to-Digital
Converter (A/D)
A/D Offset 1.2
The A/D offset is greater than specified in
the data sheet’s A/D Converter
Characteristics table.
XXXX
Ports Leakage 2.
I/O port leakage is higher than the D060
spec in the data sheet.
XXXXX
High/Low-Voltage
Detect (HLVD)
HLVD Trip 3.
The high-to-low (VDIRMAG = 0) setting of
the HLVD may send initial interrupts.
XXXXX
ECCP Auto-Shutdown 4.
The tri-state setting of the auto-shutdown
feature in the enhanced PWM may not
successfully drive the pin to
tri-state.
XXXXX
EUSART
Synchronous
Transmit
5.
When using the Synchronous Transmit
mode of the EUSART, at high baud rates,
transmitted data may become corrupted.
XXXXX
I
PD and IDD Maximum Limit 6.
Maximum current limits may be higher
than specified in Section 31.2 “DC Char-
acteristics: Power-Down and Supply
Current PIC18F87K22 Family (Indus-
trial)” of the data sheet.
X
Ultra Low-Power
Sleep
Sleep Entry 7.
Entering Ultra Low-Power Sleep
mode, by setting RETEN = 0 and
SRETEN = 1, will cause the part not to be
programmable through ICSP™.
XX X
Resets (BOR) Enable/Disable 8.
An unexpected Reset may occur if the
Brown-out Reset module (BOR) is
disabled, and then re-enabled, when
the High/Low-Voltage Detection (HLVD)
module is not enabled (HLVDCON<4> = 0).
XXXXX
RG5 Pin Leakage 9.
RG5 will cause excess pin leakage
whenever it is driven low.
X
External Memory
Bus (EMB)
Wait States 10.
The CE signal will not be extended
properly if Wait states are used.
XXXXX
Primary Oscillator XT Mode 11. XT Primary Oscillator mode does not
reliably function when the driving crystals
are above 3 MHz.
XXXXX
Note 1: Only those issues indicated in the columns labeled B3 and C3 apply to the current silicon revision.