Datasheet
PIC18F87J11 FAMILY
DS39778E-page 62 2007-2012 Microchip Technology Inc.
INDF2 PIC18F6XJ1X PIC18F8XJ1X N/A N/A N/A
POSTINC2 PIC18F6XJ1X PIC18F8XJ1X N/A N/A N/A
POSTDEC2 PIC18F6XJ1X PIC18F8XJ1X N/A N/A N/A
PREINC2 PIC18F6XJ1X PIC18F8XJ1X N/A N/A N/A
PLUSW2 PIC18F6XJ1X PIC18F8XJ1X N/A N/A N/A
FSR2H PIC18F6XJ1X PIC18F8XJ1X ---- xxxx ---- 0000 ---- uuuu
FSR2L PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
STATUS PIC18F6XJ1X PIC18F8XJ1X ---x xxxx ---u uuuu ---u uuuu
TMR0H PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
TMR0L PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
T0CON PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
OSCCON PIC18F6XJ1X PIC18F8XJ1X 0110 q100 0110 q100 0110 q10u
REFOCON PIC18F6XJ1X PIC18F8XJ1X 0-00 0000 u-uu uuuu u-uu uuuu
CM1CON PIC18F6XJ1X PIC18F8XJ1X 0001 1111 0001 1111 uuuu uuuu
CM2CON PIC18F6XJ1X PIC18F8XJ1X 0001 1111 0001 1111 uuuu uuuu
RCON
(4)
PIC18F6XJ1X PIC18F8XJ1X 0-11 1100 0-qq qquu u-qq qquu
TMR1H PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
ODCON1 PIC18F6XJ1X PIC18F8XJ1X ---0 0000 ---u uuuu ---u uuuu
TMR1L PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
ODCON2 PIC18F6XJ1X PIC18F8XJ1X ---- --00 ---- --uu ---- --uu
T1CON PIC18F6XJ1X PIC18F8XJ1X 0000 0000 u0uu uuuu uuuu uuuu
ODCON3 PIC18F6XJ1X PIC18F8XJ1X ---- --00 ---- --uu ---- --uu
TMR2 PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PADCFG1 PIC18F6XJ1X PIC18F8XJ1X ---- ---0 ---- ---u ---- ---u
PR2 PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 1111 1111
MEMCON
PIC18F6XJ1X PIC18F8XJ1X 0-00 --00 0-00 --00 u-uu --uu
T2CON PIC18F6XJ1X PIC18F8XJ1X -000 0000 -000 0000 -uuu uuuu
SSP1BUF PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
SSP1ADD PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
SSP1MSK PIC18F6XJ1X PIC18F8XJ1X 1111 1111 uuuu uuuu uuuu uuuu
SSP1STAT PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
SSP1CON1 PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
SSP1CON2 PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
TABLE 5-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS
(4)
(CONTINUED)
Register Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR
Resets,
WDT Reset,
RESET Instruction,
Stack Resets,
CM Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be effected (to cause wake-up).
4: See Table 5 -2 for Reset value for specific conditions.