Datasheet

PIC18F87J11 FAMILY
DS39778E-page 438  2007-2012 Microchip Technology Inc.
FIGURE 28-22: EUSARTx SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
TABLE 28-28: EUSARTx SYNCHRONOUS TRANSMISSION REQUIREMENTS
FIGURE 28-23: EUSARTx SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
TABLE 28-29: EUSARTx SYNCHRONOUS RECEIVE REQUIREMENTS
Param
No.
Symbol Characteristic Min Max Units Conditions
120 T
CKH2DTV SYNC XMIT (MASTER and SLAVE)
Clock High to Data Out Valid — 40 ns
121 TCKRF Clock Out Rise Time and Fall Time (Master mode) — 20 ns
122 TDTRF Data Out Rise Time and Fall Time — 20 ns
Param.
No.
Symbol Characteristic Min Max Units Conditions
125 T
DTV2CKL SYNC RCV (MASTER and SLAVE)
Data Hold Before CKx  (DTx hold time) 10 — ns
126 TCKL2DTL Data Hold After CKx  (DTx hold time) 15 — ns
121
121
120
122
TXx/CKx
RXx/DTx
Pin
Pin
Note: Refer to Figure 28-3 for load conditions.
125
126
TXx/CKx
RXx/DTx
Pin
Pin
Note: Refer to Figure 28-3 for load conditions.