Datasheet

 2007-2012 Microchip Technology Inc. DS39778E-page 183
PIC18F87J11 FAMILY
12.3.11 MASTER MODE TIMING
This section contains a number of timing examples that
represent the common Master mode configuration
options. These options vary from 8-bit to 16-bit data,
fully demultiplexed to fully multiplexed address, as well
as Wait states.
FIGURE 12-12: READ AND WRITE TIMING, 8-BIT DATA, DEMULTIPLEXED ADDRESS
FIGURE 12-13: READ TIMING, 8-BIT DATA, PARTIALLY MULTIPLEXED ADDRESS
PMCS2
PMWR
PMRD
PMPIF
PMD<7:0>
PMCS1
PMA<13:0>
Q2 Q3 Q4Q1 Q2 Q3 Q4Q1 Q2 Q3 Q4Q1Q2 Q3 Q4Q1 Q2 Q3 Q4Q1 Q2 Q3 Q4Q1
BUSY
Q2 Q3 Q4Q1
PMCS2
PMWR
PMRD
PMALL
PMD<7:0>
PMCS1
PMA<13:8>
Q2 Q3 Q4Q1 Q2 Q3 Q4Q1 Q2 Q3 Q4Q1Q2 Q3 Q4Q1 Q2 Q3 Q4Q1 Q2 Q3 Q4Q1
PMPIF
BUSY
Data
Address<7:0>