Datasheet

PIC18F87J11 FAMILY
DS39778E-page 156 2007-2012 Microchip Technology Inc.
TABLE 11-14: PORTF FUNCTIONS
Pin Name Function
TRIS
Setting
I/O
I/O
Type
Description
RF1/AN6/
C2OUT
RF1 0 O DIG LATF<1> data output; not affected by analog input.
1 I ST PORTF<1> data input; disabled when analog input is enabled.
AN6 1 I ANA A/D Input Channel 6. Default configuration on POR.
C2OUT x O DIG Comparator 2 output.
RF2/PMA5/
AN7//C1OUT
RF2 0 O DIG LATF<2> data output; not affected by analog input.
1 I ST PORTF<2> data input; disabled when analog input is enabled.
PMA5 x O DIG Parallel Master Port address.
AN7 1 I ANA A/D Input Channel 7. Default configuration on POR.
C1OUT x O DIG Comparator 1 output.
RF3/AN8/
C2INB
RF3 0 O DIG LATF<3> data output; not affected by analog input.
1 I ST PORTF<3> data input; disabled when analog input is enabled.
AN8 1 I ANA A/D Input Channel 8. Default configuration on POR.
C2INB x I ANA Comparator 2 Input B.
RF4/AN9/
C2INA
RF4 0 O DIG LATF<4> data output; not affected by analog input.
1 I ST PORTF<4> data input; disabled when analog input is enabled.
AN9 1 I ANA A/D Input Channel 9. Default configuration on POR.
C2INA x I ANA Comparator 2 Input A.
RF5/PMD2/
AN10/C1INB/
CV
REF
RF5 0 O DIG LATF<5> data output; not affected by analog input. Disabled when
CV
REF output is enabled.
1 I ST PORTF<5> data input; disabled when analog input is enabled.
Disabled when CV
REF output is enabled.
PMD2
(1)
x O DIG Parallel Master Port data out.
x I TTL Parallel Master Port data input.
AN10 1 I ANA A/D Input Channel 10 and Comparator C1+ input. Default input
configuration on POR.
C1INB x I ANA Comparator 1 Input B.
CV
REF x O ANA Comparator voltage reference output. Enabling this feature disables
digital I/O.
RF6/PMD1/
AN11/C1INA
RF6 0 O DIG LATF<6> data output; not affected by analog input.
1 I ST PORTF<6> data input; disabled when analog input is enabled.
PMD1
(1)
x O DIG Parallel Master Port data out.
x I TTL Parallel Master Port data input.
AN11 1 I ANA A/D Input Channel 11 and Comparator C1- input. Default input
configuration on POR; does not affect digital output.
C1INA x I ANA Comparator 1 Input A.
RF7/PMD0/
S
S1
RF7 0 O DIG LATF<7> data output.
1 I ST PORTF<7> data input.
PMD0
(1)
x O DIG Parallel Master Port data out.
x I TTL Parallel Master Port data input.
SS1
1 I TTL Slave select input for MSSP1 module.
Legend: O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Note 1: Alternate PMP configuration when the PMPMX Configuration bit = 0; available on 80-pin devices only.