Datasheet

2003-2013 Microchip Technology Inc. DS30491D-page 301
PIC18F6585/8585/6680/8680
REGISTER 23-28: BnEIDH: TX/RX BUFFER n EXTENDED IDENTIFIER REGISTERS,
HIGH BYTE IN RECEIVE MODE [0 n 5, TXnEN (BSEL0<n>) = 0]
(1)
REGISTER 23-29: BnEIDH: TX/RX BUFFER n EXTENDED IDENTIFIER REGISTERS,
HIGH BYTE IN TRANSMIT MODE [0 n 5, TXnEN (BSEL0<n>) = 1]
(1)
R-xR-xR-xR-xR-xR-xR-xR-x
EID15 EID14 EID13 EID12 EID11 EID10 EID9 EID8
bit 7 bit 0
bit 7-0 EID15:EID8: Extended Identifier bits
Note 1: These registers are available in Mode 1 and 2 only.
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
R/W-xR/W-xR/W-xR/W-xR/W-xR/W-xR/W-xR/W-x
EID15 EID14 EID13 EID12 EID11 EID10 EID9 EID8
bit 7 bit 0
bit 7-0 EID15:EID8: Extended Identifier bits
Note 1: These registers are available in Mode 1 and 2 only.
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
18F8680.book Page 301 Tuesday, January 29, 2013 1:32 PM