Datasheet
2003-2013 Microchip Technology Inc. DS30491D-page 21
PIC18F6585/8585/6680/8680
PORTJ is a bidirectional I/O port
(5)
.
RJ0/ALE
RJ0
ALE
—— 62
I/O
O
ST
TTL
Digital I/O.
External memory address latch
enable.
RJ1/OE
RJ1
OE
—— 61
I/O
O
ST
TTL
Digital I/O.
External memory output enable.
RJ2/WRL
RJ2
WRL
—— 60
I/O
O
ST
TTL
Digital I/O.
External memory write low control.
RJ3/WRH
RJ3
WRH
—— 59
I/O
O
ST
TTL
Digital I/O.
External memory write high control.
RJ4/BA0
RJ4
BA0
—— 39
I/O
O
ST
TTL
Digital I/O.
System bus byte address 0 control.
RJ5/CE
CE
—— 40 I/O
O
ST
TTL
Digital I/O
External memory chip enable.
RJ6/LB
RJ6
LB
—— 42
I/O
O
ST
TTL
Digital I/O.
External memory low byte select.
RJ7/UB
RJ7
UB
—— 41
I/O
O
ST
TTL
Digital I/O.
External memory high byte select.
V
SS 9, 25,
41, 56
19, 36,
53, 68
11, 31,
51, 70
P — Ground reference for logic and I/O pins.
V
DD 10, 26,
38, 57
2, 20,
37, 49
12, 32,
48, 71
P — Positive supply for logic and I/O pins.
AV
SS 20 30 26 P — Ground reference for analog modules.
AV
DD 19 29 25 P — Positive supply for analog modules.
NC — 1, 18,
35, 52
— — — No connect.
TABLE 1-2: PIC18F6585/8585/6680/8680 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
DescriptionPIC18F6X8X PIC18F8X8X
TQFP PLCC TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
Note 1: Alternate assignment for CCP2 in all operating modes except Microcontroller – applies to PIC18F8X8X only.
2: Default assignment when CCP2MX is set.
3: External memory interface functions are only available on PIC18F8X8X devices.
4: CCP2 is multiplexed with this pin by default when configured in Microcontroller mode; otherwise, it is
multiplexed with either RB3 or RC1.
5: PORTH and PORTJ are only available on PIC18F8X8X (80-pin) devices.
6: PSP is available in Microcontroller mode only.
7: On PIC18F8X8X devices, these pins can be multiplexed with RH7/RH6 by changing the ECCPMX
configuration bit.
18F8680.book Page 21 Tuesday, January 29, 2013 1:32 PM