Datasheet
2003-2013 Microchip Technology Inc. DS30491D-page 179
PIC18F6585/8585/6680/8680
FIGURE 16-4: PWM OUTPUT RELATIONSHIPS (ACTIVE-LOW STATE)
0
Period
00
10
01
11
SIGNAL
PR2 + 1
CCP1CON
<7:6>
P1A Modulated
P1A Modulated
P1B Modulated
P1A Active
P1B Inactive
P1C Inactive
P1D Modulated
P1A Inactive
P1B Modulated
P1C Active
P1D Inactive
Duty
Cycle
(Single Output)
(Half-Bridge)
(Full-Bridge,
Forward)
(Full-Bridge,
Reverse)
Delay
(1)
Delay
(1)
Note 1: Dead-band delay is programmed using the ECCP1DEL register (Section 16.2.6 “Programmable Dead-Band Delay”).
Relationships:
• Period = 4 * T
OSC * (PR2 + 1) * (TMR2 prescale value)
• Duty Cycle = T
OSC * (CCPR1L<7:0>:CCP1CON<5:4>) * (TMR2 prescale value)
• Delay = 4 * T
OSC * (PWM1CON<6:0>)
18F8680.book Page 179 Tuesday, January 29, 2013 1:32 PM