Datasheet

 2003-2013 Microchip Technology Inc. DS39612C-page 49
PIC18F6525/6621/8525/8621
TABLE 4-2: SPECIAL FUNCTION REGISTER MAP
Address Name Address Name Address Name Address Name
FFFh TOSU FDFh INDF2
(3)
FBFh CCPR1H F9Fh IPR1
FFEh TOSH FDEh POSTINC2
(3)
FBEh CCPR1L F9Eh PIR1
FFDh TOSL FDDh POSTDEC2
(3)
FBDh CCP1CON F9Dh PIE1
FFCh STKPTR FDCh PREINC2
(3)
FBCh CCPR2H F9Ch MEMCON
(2)
FFBh PCLATU FDBh PLUSW2
(3)
FBBh CCPR2L F9Bh —
(1)
FFAh PCLATH FDAh FSR2H FBAh CCP2CON F9Ah TRISJ
(2)
FF9h PCL FD9h FSR2L FB9h CCPR3H F99h TRISH
(2)
FF8h TBLPTRU FD8h STATUS FB8h CCPR3L F98h TRISG
FF7h TBLPTRH FD7h TMR0H FB7h CCP3CON F97h TRISF
FF6h TBLPTRL FD6h TMR0L FB6h ECCP1AS F96h TRISE
FF5h TABLAT FD5h T0CON FB5h CVRCON F95h TRISD
FF4h PRODH FD4h
—
(1)
FB4h CMCON F94h TRISC
FF3h PRODL FD3h OSCCON FB3h TMR3H F93h TRISB
FF2h INTCON FD2h LVDCON FB2h TMR3L F92h TRISA
FF1h INTCON2 FD1h WDTCON FB1h T3CON F91h LATJ
(2)
FF0h INTCON3 FD0h RCON FB0h PSPCON
(4)
F90h LATH
(2)
FEFh INDF0
(3)
FCFh TMR1H FAFh SPBRG1 F8Fh LATG
FEEh POSTINC0
(3)
FCEh TMR1L FAEh RCREG1 F8Eh LATF
FEDh POSTDEC0
(3)
FCDh T1CON FADh TXREG1 F8Dh LATE
FECh PREINC0
(3)
FCCh TMR2 FACh TXSTA1 F8Ch LATD
FEBh PLUSW0
(3)
FCBh PR2 FABh RCSTA1 F8Bh LATC
FEAh FSR0H FCAh T2CON FAAh EEADRH F8Ah LATB
FE9h FSR0L FC9h SSPBUF FA9h EEADR F89h LATA
FE8h WREG FC8h SSPADD FA8h EEDATA F88h PORTJ
(2)
FE7h INDF1
(3)
FC7h SSPSTAT FA7h EECON2 F87h PORTH
(2)
FE6h POSTINC1
(3)
FC6h SSPCON1 FA6h EECON1 F86h PORTG
FE5h POSTDEC1
(3)
FC5h SSPCON2 FA5h IPR3 F85h PORTF
FE4h PREINC1
(3)
FC4h ADRESH FA4h PIR3 F84h PORTE
FE3h PLUSW1
(3)
FC3h ADRESL FA3h PIE3 F83h PORTD
FE2h FSR1H FC2h ADCON0 FA2h IPR2 F82h PORTC
FE1h FSR1L FC1h ADCON1 FA1h PIR2 F81h PORTB
FE0h BSR FC0h ADCON2 FA0h PIE2 F80h PORTA
Note 1: Unimplemented registers are read as ‘0’.
2: This register is not available on PIC18F6525/6621 devices and reads as ‘0’.
3: This is not a physical register.
4: Enabled only in Microcontroller mode for PIC18F8525/8621 devices.