Datasheet
2003-2013 Microchip Technology Inc. DS39612C-page 351
PIC18F6525/6621/8525/8621
FIGURE 27-18: I
2
C™ BUS START/STOP BITS TIMING
TABLE 27-19: I
2
C™ BUS START/STOP BITS REQUIREMENTS (SLAVE MODE)
82 TssL2doV SDO Data Output Valid after
SS
Edge
PIC18F6525/6621/
8525/8621
—50ns
PIC18LF6X2X/8X2X — 100 ns
83 TscH2ssH,
TscL2ssH
SS
after SCK Edge 1.5 TCY + 40 — ns
Param
No.
Symbol Characteristic Min Max Units Conditions
Note 1: Requires the use of Parameter #73A.
2: Only if Parameter #71A and #72A are used.
Note: Refer to Figure 27-4 for load conditions.
91
92
93
SCL
SDA
Start
Condition
Stop
Condition
90
Param.
No.
Symbol Characteristic Min Max Units Conditions
90 T
SU:STA Start Condition 100 kHz mode 4700 — ns Only relevant for Repeated
Start condition
Setup Time 400 kHz mode 600 —
91 THD:STA Start Condition 100 kHz mode 4000 — ns After this period, the first
clock pulse is generated
Hold Time 400 kHz mode 600 —
92 T
SU:STO Stop Condition 100 kHz mode 4700 — ns
Setup Time 400 kHz mode 600 —
93 T
HD:STO Stop Condition 100 kHz mode 4000 — ns
Hold Time 400 kHz mode 600 —