Datasheet

PIC18F6525/6621/8525/8621
DS39612C-page 344  2003-2013 Microchip Technology Inc.
TABLE 27-12: TIMER0 AND TIMER1 EXTERNAL CLOCK REQUIREMENTS
FIGURE 27-12: CAPTURE/COMPARE/PWM TIMINGS (ALL ECCP/CCP MODULES)
Param.
No.
Symbol Characteristic Min Max Units Conditions
40 Tt0H T0CKI High Pulse Width No prescaler 0.5 T
CY + 20 — ns
With prescaler 10 — ns
41 Tt0L T0CKI Low Pulse Width No prescaler 0.5 T
CY + 20 — ns
With prescaler 10 — ns
42 Tt0P T0CKI Period No prescaler T
CY + 10 — ns
With prescaler Greater of:
20 ns or T
CY + 40
N
— ns N = prescale
value
(1, 2, 4,..., 256)
45 Tt1H T13CKI
High Time
Synchronous, no prescaler 0.5 T
CY + 20 — ns
Synchronous,
with prescaler
PIC18F6525/6621/
8525/8621
10 — ns
PIC18LF6X2X/8X2X 25 — ns
Asynchronous PIC18F6525/6621/
8525/8621
30 — ns
PIC18LF6X2X/8X2X 50 — ns
46 Tt1L T13CKI
Low Time
Synchronous, no prescaler 0.5 T
CY + 5 — ns
Synchronous,
with prescaler
PIC18F6525/6621/
8525/8621
10 — ns
PIC18LF6X2X/8X2X 25 — ns
Asynchronous PIC18F6525/6621/
8525/8621
30 — ns
PIC18LF6X2X/8X2X TBD TBD ns
47 Tt1P T13CKI
Input Period
Synchronous Greater of:
20 ns or T
CY + 40
N
— ns N = prescale
value (1, 2, 4, 8)
Asynchronous 60 — ns
Ft1 T13CKI Oscillator Input Frequency Range DC 50 kHz
48 Tcke2tmrI Delay from External T13CKI Clock Edge to Timer
Increment
2 T
OSC 7 TOSC —
Legend: TBD = To Be Determined
Note: Refer to Figure 27-4 for load conditions.
CCPx
(Capture Mode)
50 51
52
CCPx
53
54
(Compare or PWM Mode)