Datasheet
PIC18F6525/6621/8525/8621
DS39612C-page 340 2003-2013 Microchip Technology Inc.
FIGURE 27-7: PROGRAM MEMORY READ TIMING DIAGRAM
TABLE 27-9: PROGRAM MEMORY READ TIMING REQUIREMENTS
22† TINP INT pin High or Low Time TCY ——ns
23† T
RBP RB7:RB4 Change INT High or Low Time TCY ——ns
24† T
RCP RC7:RC4 Change INT High or Low Time 20 ns
Param.
No
Symbol Characteristics Min Typ Max Units
150 TadV2alL Address Out Valid to ALE (address
setup time)
0.25 T
CY – 10 — — ns
151 TalL2adl ALE to Address Out Invalid (address
hold time)
5——ns
155 TalL2oeL ALE to OE
10 0.125 TCY —ns
160 TadZ2oeL AD high-Z to OE
(bus release to OE)0——ns
161 ToeH2adD OE
to AD Driven 0.125 TCY – 5 — — ns
162 TadV2oeH LS Data Valid before OE
(data setup time) 20 — — ns
163 ToeH2adl OE
to Data In Invalid (data hold time) 0 — — ns
164 TalH2alL ALE Pulse Width — 0.25 TCY —ns
165 ToeL2oeH OE
Pulse Width 0.5 TCY – 5 0.5 TCY —ns
166 TalH2alH ALE to ALE (cycle time) 40 ns T
CY —ns
Param
No.
Symbol Characteristic Min Typ Max Units Conditions
† These parameters are asynchronous events not related to any internal clock edges.
Note 1: Measurements are taken in RC mode, where CLKO output is 4 x T
OSC.
Q1 Q2 Q3 Q4 Q1 Q2
OSC1
ALE
OE
Address Data from External
164
166
160
165
161
151
162
163
AD<15:0>
167
168
155
Address
Address
150
A<19:16>
Address
169
BA0
CE
171
171A
Operating Conditions: 2.0V < VCC < 5.5V, -40°C < TA < +125°C unless otherwise stated.