Datasheet

PIC18F6525/6621/8525/8621
DS39612C-page 338  2003-2013 Microchip Technology Inc.
27.4.3 TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 27-5: EXTERNAL CLOCK TIMING (ALL MODES EXCEPT PLL)
TABLE 27-6: EXTERNAL CLOCK TIMING REQUIREMENTS
OSC1
CLKO
Q4 Q1 Q2 Q3 Q4 Q1
1
2
3
3
4
4
Param.
No.
Symbol Characteristic Min Max Units Conditions
1A F
OSC External CLKI Frequency
(1)
DC 25 MHz EC, ECIO
(2)
(-40ºC to +85ºC)
DC 40 MHz EC, ECIO
DC 25 MHz EC, ECIO (+85ºC to +125ºC)
Oscillator Frequency
(1)
DC 4 MHz RC oscillator
0.1 4 MHz XT oscillator
4 25 MHz HS oscillator
4 10 MHz HS + PLL oscillator
4 6.25 MHz HS + PLL oscillator
(2)
5 33 kHz LP Oscillator mode
1T
OSC External CLKI Period
(1)
25 — ns EC, ECIO
40 — ns EC, ECIO
(2)
40 — ns EC, ECIO (+85ºC to +125ºC)
Oscillator Period
(1)
250 — ns RC oscillator
250 10,000 ns XT oscillator
40
100
160
250
250
250
ns
ns
ns
HS oscillator
HS + PLL oscillator
HS + PLL oscillator
(2)
30 200 s LP oscillator
2T
CY Instruction Cycle Time
(1)
100 — ns TCY = 4/FOSC
3 TosL,
TosH
External Clock in (OSC1)
High or Low Time
30 — ns XT oscillator
2.5 — s LP oscillator
10 — ns HS oscillator
4TosR,
TosF
External Clock in (OSC1)
Rise or Fall Time
— 20 ns XT oscillator
— 50 ns LP oscillator
— 7.5 ns HS oscillator
Note 1: Instruction cycle period (T
CY) equals four times the input oscillator time base period for all configurations
except PLL. All specified values are based on characterization data for that particular oscillator type under
standard operating conditions with the device executing code. Exceeding these specified limits may result
in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested
to operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock
input is used, the “max.” cycle time limit is “DC” (no clock) for all devices.
2: PIC18F6525/6621/8525/8621 devices using external memory interface.