Datasheet

 2003-2013 Microchip Technology Inc. DS39612C-page 273
PIC18F6525/6621/8525/8621
FIGURE 24-6: EXTERNAL BLOCK TABLE READ (EBTRn) ALLOWED
24.4.2 DATA EEPROM CODE
PROTECTION
The entire data EEPROM is protected from external
reads and writes by two bits: CPD and WRTD. CPD
inhibits external reads and writes of data EEPROM.
WRTD inhibits external writes to data EEPROM. The
CPU can continue to read data EEPROM regardless of
the protection bit settings.
24.4.3 CONFIGURATION REGISTER
PROTECTION
The Configuration registers can be write-protected.
The WRTC bit controls protection of the Configuration
registers. In user mode, the WRTC bit is readable only.
WRTC can only be written via ICSP or an external
programmer.
WRTB,EBTRB = 11
WRT0,EBTR0 = 10
WRT1,EBTR1 = 11
WRT2,EBTR2 = 11
WRT3,EBTR3 = 11
TBLRD*
TBLPTR = 000FFFh
PC = 003FFEh
Register Values Program Memory Configuration Bit Settings
Results: Table reads permitted within Block n, even when EBTRBn = 0.
TABLAT register returns the value of the data at the location TBLPTR.
0007FFh
000800h
003FFFh
004000h
007FFFh
008000h
00BFFFh
00C000h
00FFFFh
000000h