Datasheet

 2003-2013 Microchip Technology Inc. DS39612C-page 263
PIC18F6525/6621/8525/8621
REGISTER 24-6: CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
REGISTER 24-7: CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)
R/P-1 U-0 U-0 U-0 U-0 R/P-1 U-0 R/P-1
DEBUG
— — — —LVP—STVREN
bit 7 bit 0
bit 7 DEBUG
: Background Debugger Enable bit
1 = Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.
0 = Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.
bit 6-3 Unimplemented: Read as ‘0’
bit 2 LVP: Low-Voltage ICSP Enable bit
1 = Low-Voltage ICSP enabled
0 = Low-Voltage ICSP disabled
bit 1 Unimplemented: Read as ‘0’
bit 0 STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack full/underflow will cause Reset
0 = Stack full/underflow will not cause Reset
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed u = Unchanged from programmed state
U-0 U-0 U-0 U-0 R/C-1 R/C-1 R/C-1 R/C-1
— — — —CP3
(1)
CP2 CP1 CP0
bit 7 bit 0
bit 7-4 Unimplemented: Read as ‘0’
bit 3 CP3: Code Protection bit
(1)
1 = Block 3 (00C000-00FFFFh) not code-protected
0 = Block 3 (00C000-00FFFFh) code-protected
Note 1: Unimplemented in PIC18FX525 devices; maintain this bit set.
bit 2 CP2: Code Protection bit
1 = Block 2 (008000-00BFFFh) not code-protected
0 = Block 2 (008000-00BFFFh) code-protected
bit 1 CP1: Code Protection bit
1 = Block 1 (004000-007FFFh) not code-protected
0 = Block 1 (004000-007FFFh) code-protected
bit 0 CP0: Code Protection bit
1 = Block 0 (000800-003FFFh) not code-protected
0 = Block 0 (000800-003FFFh) code-protected
Legend:
R = Readable bit C = Clearable bit U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed u = Unchanged from programmed state