Datasheet

 2003-2013 Microchip Technology Inc. DS39612C-page 237
PIC18F6525/6621/8525/8621
The value in the ADRESH/ADRESL registers is
not modified for a Power-on Reset. The ADRESH/
ADRESL registers will contain unknown data after a
Power-on Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 20.1
“A/D Acquisition Requirements”. After this acquisi-
tion time has elapsed, the A/D conversion can be
started.
The following steps should be followed to do an A/D
conversion:
1. Configure the A/D module:
• Configure analog pins, voltage reference and
digital I/O (ADCON1)
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON2)
• Turn on A/D module (ADCON0)
2. Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
3. Wait the required acquisition time (not required
in case of auto-acquisition time).
4. Start conversion:
• Set GO/DONE
bit (ADCON0 register)
5. Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE
bit to be cleared
OR
• Waiting for the A/D interrupt
6. Read A/D Result registers (ADRESH:ADRESL);
clear bit ADIF, if required.
7. For next conversion, go to step 1 or step 2, as
required. The A/D conversion time per bit is
defined as T
AD. A minimum wait of 2 TAD is
required before the next acquisition starts.
FIGURE 20-2: ANALOG INPUT MODEL
VAIN
CPIN
Rs
ANx
5 pF
V
DD
VT = 0.6V
V
T = 0.6V
I
LEAKAGE
RIC 1k
Sampling
Switch
SS
R
SS
CHOLD = 120 pF
V
SS
6V
Sampling Switch
5V
4V
3V
2V
567891011
(k)
VDD
± 500 nA
Legend: CPIN = input capacitance
V
T = threshold voltage
I
LEAKAGE = leakage current at the pin due to
various junctions
R
IC = interconnect resistance
SS = sampling switch
C
HOLD = sample/hold capacitance (from DAC)
R
SS = sampling switch resistance