Datasheet
2009-2011 Microchip Technology Inc. DS39957D-page 5
PIC18F87K90 FAMILY
Pin Diagrams – PIC18F6XK90
64-Pin QFN
(3)
, TQFP
50 49
RE2/LCDBIAS3/P2B/CCP10
(2)
RE3/COM0/P3C/CCP9
(2)
/REFO
RE4/COM1/P3B/CCP8
RE5/COM2/P1C/CCP7
RE6/COM3/P1B/CCP6
RE7/ECCP2
(1)
/SEG31/P2A
RD0/SEG0/CTPLS
V
DD
VSS
RD1/SEG1/T5CKI/T7G
RD2/SEG2
RD3/SEG3
RD4/SEG4/SDO2
RD5/SEG5/SDI2/SDA2
RD6/SEG6/SCK2/SCL2
RD7/SEG7/SS2
RE1/LCDBIAS2/P2C
RE0/LCDBIAS1/P2D
RG0/ECCP3/P3A
RG1/TX2/CK2/AN19/C3OUT
RG2/RX2/DT2/AN18/C3INA
RG3/CCP4/AN17/P3D/C3INB
MCLR
/RG5
V
SS
VDDCORE/VCAP
RF7/AN5/SS1/SEG25
RF6/AN11/SEG24/C1INA
RF5/AN10/CV
REF/SEG23/C1INB
RF4/AN9/SEG22/C2INA
RF3/AN8/SEG21/C2INB/CTMUI
RF2/AN7/C1OUT/SEG20
RB0/INT0/SEG30/FLTO
RB1/INT1/SEG8
RB2/INT2/SEG9/CTED1
RB3/INT3/SEG10/CTED2/P2A
RB4/KBI0/SEG11
RB5/KBI1/SEG29/T3CKI/T1G
RB6/KBI2/PGC
V
SS
OSC2/CLKO/RA6
OSC1/CLKI/RA7
V
DD
RB7/KBI3/PGD
RC4/SDI1/SDA1/SEG16
RC3/SCK1/SCL1/SEG17
RC2/ECCP1/P1A/SEG13
ENVREG
RF1/AN6/C2OUT/SEG19/CTDIN
AV
DD
AVSS
RA3/AN3/VREF+
RA2/AN2/V
REF-
RA1/AN1/SEG18
RA0/AN0/ULPWU
V
SS
VDD
RA4/T0CKI/SEG14
RA5/AN4/T1CKI/SEG15/T3G/HLVDIN
RC1/SOSCI/ECCP2
(1)
/P2A/SEG32
RC0/SOSCO/SCLKI
RC7/RX1/DT1/SEG28
RC6/TX1/CK1/SEG27
RC5/SDO1/SEG12
5453 52 5158 57 56 5560 59
64
63 62 61
Note 1: The ECCP2 pin placement depends on the CCP2MX Configuration bit setting.
2: Not available on the PIC18F65K90 and PIC18F85K90.
3: For the QFN package, it is recommended that the bottom pad be connected to V
SS.
PIC18F65K90
PIC18F66K90
PIC18F67K90
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17 18 19 20 21 22 23 24 25 26
31
27 28
29 30 32
38
37
36
35
34
33
40
39
48
47
46
45
44
43
42
41
RG0/ECCP3/P3A
RG4/SEG26/RTCC/T7CKI
(2)
/T5G/CCP5/AN16/P1D/C3INC