Datasheet

Table Of Contents
PIC18F85J90 FAMILY
DS39770C-page 58 2010 Microchip Technology Inc.
FSR1H PIC18F6XJ90 PIC18F8XJ90 ---- xxxx ---- uuuu ---- uuuu
FSR1L PIC18F6XJ90 PIC18F8XJ90 xxxx xxxx uuuu uuuu uuuu uuuu
BSR PIC18F6XJ90 PIC18F8XJ90 ---- 0000 ---- 0000 ---- uuuu
INDF2 PIC18F6XJ90 PIC18F8XJ90 N/A N/A N/A
POSTINC2 PIC18F6XJ90 PIC18F8XJ90 N/A N/A N/A
POSTDEC2 PIC18F6XJ90 PIC18F8XJ90 N/A N/A N/A
PREINC2 PIC18F6XJ90 PIC18F8XJ90 N/A N/A N/A
PLUSW2 PIC18F6XJ90 PIC18F8XJ90 N/A N/A N/A
FSR2H PIC18F6XJ90 PIC18F8XJ90 ---- xxxx ---- uuuu ---- uuuu
FSR2L PIC18F6XJ90 PIC18F8XJ90 xxxx xxxx uuuu uuuu uuuu uuuu
STATUS PIC18F6XJ90 PIC18F8XJ90 ---x xxxx ---u uuuu ---u uuuu
TMR0H PIC18F6XJ90 PIC18F8XJ90 0000 0000 0000 0000 uuuu uuuu
TMR0L PIC18F6XJ90 PIC18F8XJ90 xxxx xxxx uuuu uuuu uuuu uuuu
T0CON PIC18F6XJ90 PIC18F8XJ90 1111 1111 1111 1111 uuuu uuuu
OSCCON PIC18F6XJ90 PIC18F8XJ90 0100 q000 0100 q000 uuuu quuu
LCDREG PIC18F6XJ90 PIC18F8XJ90 -011 1100 -011 1000 -uuu uuuu
WDTCON PIC18F6XJ90 PIC18F8XJ90 0--- ---0 0--- ---0 u--- ---u
RCON
(4)
PIC18F6XJ90 PIC18F8XJ90 0-11 11q0 0-qq qquu u-uu qquu
TMR1H PIC18F6XJ90 PIC18F8XJ90 xxxx xxxx uuuu uuuu uuuu uuuu
TMR1L PIC18F6XJ90 PIC18F8XJ90 xxxx xxxx uuuu uuuu uuuu uuuu
T1CON PIC18F6XJ90 PIC18F8XJ90 0000 0000 u0uu uuuu uuuu uuuu
TMR2 PIC18F6XJ90 PIC18F8XJ90 0000 0000 0000 0000 uuuu uuuu
PR2 PIC18F6XJ90 PIC18F8XJ90 1111 1111 1111 1111 1111 1111
T2CON PIC18F6XJ90 PIC18F8XJ90 -000 0000 -000 0000 -uuu uuuu
SSPBUF PIC18F6XJ90 PIC18F8XJ90 xxxx xxxx uuuu uuuu uuuu uuuu
SSPADD PIC18F6XJ90 PIC18F8XJ90 0000 0000 0000 0000 uuuu uuuu
SSPSTAT PIC18F6XJ90 PIC18F8XJ90 0000 0000 0000 0000 uuuu uuuu
SSPCON1 PIC18F6XJ90 PIC18F8XJ90 0000 0000 0000 0000 uuuu uuuu
SSPCON2 PIC18F6XJ90 PIC18F8XJ90 0000 0000 0000 0000 uuuu uuuu
TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR
Resets
WDT Reset
RESET Instruction
Stack Resets
CM Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-1 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read as0’.