Datasheet

 2010 Microchip Technology Inc. DS39770C-page 291
PIC18F85J90 FAMILY
23.0 SPECIAL FEATURES OF THE
CPU
PIC18F85J90 family devices include several features
intended to maximize reliability and minimize cost
through elimination of external components. These are:
• Oscillator Selection
• Resets:
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Brown-out Reset (BOR)
• Interrupts
• Watchdog Timer (WDT)
• Fail-Safe Clock Monitor
• Two-Speed Start-up
• Code Protection
• In-Circuit Serial Programming
The oscillator can be configured for the application
depending on frequency, power, accuracy and cost. All
of the options are discussed in detail in Section 3.0
“Oscillator Configurations”.
A complete discussion of device Resets and interrupts
is available in previous sections of this data sheet.
In addition to their Power-up and Oscillator Start-up
Timers provided for Resets, the PIC18F85J90 family
family of devices have a configurable Watchdog Timer
which is controlled in software.
The inclusion of an internal RC oscillator also provides
the additional benefits of a Fail-Safe Clock Monitor
(FSCM) and Two-Speed Start-up. FSCM provides for
background monitoring of the peripheral clock and
automatic switchover in the event of its failure.
Two-Speed Start-up enables code to be executed
almost immediately on start-up, while the primary clock
source completes its start-up delays.
All of these features are enabled and configured by
setting the appropriate Configuration register bits.
23.1 Configuration Bits
The Configuration bits can be programmed (read as
‘0’), or left unprogrammed (read as ‘1’), to select
various device configurations. These bits are mapped
starting at program memory location 300000h. A
complete list is shown in Table 23-2. A detailed
explanation of the various bit functions is provided in
Register 23-1 through Register 23-5.
23.1.1 CONSIDERATIONS FOR
CONFIGURING THE PIC18F85J90
FAMILY DEVICES
Unlike some previous PIC18 microcontrollers,
PIC18F85J90 family devices do not use persistent
memory registers to store configuration information.
The Configuration registers, CONFIG1L through
CONFIG4H, are implemented as volatile memory.
Immediately after power-up, or after a device Reset, the
microcontroller hardware automatically loads the
CONFIG1L through CONFIG4L registers with configura-
tion data stored in nonvolatile Flash program memory.
The last four words of Flash program memory, known as
the Flash Configuration Words (FCW), are used to store
the configuration data.
Table 23-1 provides the Flash program memory
mapping, which will be loaded into the corresponding
Configuration register.
When creating applications for these devices, users
should always specifically allocate the location of the
Flash Configuration Word for configuration data. This is
to make certain that program code is not stored in this
address when the code is compiled.
The volatile memory cells used for the Configuration
bits always reset to ‘1’ on Power-on Resets. For all
other types of Reset events, the previously
programmed values are maintained and used without
reloading from program memory.
The four Most Significant bits of CONFIG1H,
CONFIG2H and CONFIG3H in program memory
should also be ‘1111’. This makes these Configuration
Words appear to be NOP instructions in the remote
event that their locations are ever executed by
accident. Since Configuration bits are not implemented
in the corresponding locations, writing ‘1’s to these
locations has no effect on device operation.
To prevent inadvertent configuration changes during
code execution, all programmable Configuration bits
are write-once. After a bit is initially programmed during
a power cycle, it cannot be written to again. Changing
a device configuration requires that power to the device
be cycled.
TABLE 23-1: MAPPING OF THE FLASH
CONFIGURATION WORDS TO
THE CONFIGURATION
REGISTERS
Configuration
Byte
Code Space
Address
Configuration
Register Address
CONFIG1L XXXF8h 300000h
CONFIG1H XXXF9h 300001h
CONFIG2L XXXFAh 300002h
CONFIG2H XXXFBh 300003h
CONFIG3L XXXFCh 300004h
CONFIG3H XXXFDh 300005h
Legend: Unimplemented in PIC18F85J90 family
devices.