Datasheet
2003-2013 Microchip Technology Inc. DS30491D-page 363
PIC18F6585/8585/6680/8680
24.8 Low-Voltage ICSP Programming
The LVP bit in Configuration register, CONFIG4L,
enables Low-Voltage ICSP Programming. This mode
allows the microcontroller to be programmed via ICSP
using a V
DD source in the operating voltage range. This
only means that V
PP does not have to be brought to VIHH
but can instead be left at the normal operating voltage.
In this mode, the RB5/KBI1/PGM pin is dedicated to the
programming function and ceases to be a general pur-
pose I/O pin. During programming, V
DD is applied to the
RG5/MCLR
/VPP pin. To enter Programming mode, VDD
must be applied to the RB5/KBI1/PGM pin, provided the
LVP bit is set. The LVP bit defaults to a ‘1’ from the
factory.
If Low-Voltage Programming mode is not used, the LVP
bit can be programmed to a ‘0’ and RB5/KBI1/PGM
becomes a digital I/O pin. However, the LVP bit may
only be programmed when programming is entered
with V
IHH on RG5/MCLR/VPP.
It should be noted that once the LVP bit is programmed
to ‘0’, only the High-Voltage Programming mode is
available and only High-Voltage Programming mode
can be used to program the device.
When using low-voltage ICSP, the part must be sup-
plied 4.5V to 5.5V if a bulk erase will be executed. This
includes reprogramming of the code-protect bits from
an on-state to an off-state. For all other cases of low-
voltage ICSP, the part may be programmed at the
normal operating voltage. This means unique user IDs
or user code can be reprogrammed or added.
Note 1: The High-Voltage Programming mode is
always available regardless of the state of
the LVP bit, by applying V
IHH to the MCLR
pin.
2: While in Low-Voltage ICSP mode, the
RB5 pin can no longer be used as a
general purpose I/O pin and should be
held low during normal operation.
3: When using Low-Voltage ICSP Program-
ming (LVP) and the pull-ups on PORTB
are enabled, bit 5 in the TRISB register
must be cleared to disable the pull-up on
RB5 and ensure the proper operation of
the device.
4: If the device Master Clear is disabled,
verify that either of the following is done to
ensure proper entry into ICSP mode:
a) disable Low-Voltage Programming
(CONFIG4L<2> = 0); or
b) make certain that RB5/KBI1/PGM is
held low during entry into ICSP.
18F8680.book Page 363 Tuesday, January 29, 2013 1:32 PM