Datasheet

 2003-2013 Microchip Technology Inc. DS30491D-page 265
PIC18F6585/8585/6680/8680
21.0 COMPARATOR VOLTAGE
REFERENCE MODULE
The comparator voltage reference is a 16-tap resistor
ladder network that provides a selectable voltage
reference. The resistor ladder is segmented to provide
two ranges of CV
REF values and has a power-down
function to conserve power when the reference is not
being used. The CVRCON register controls the
operation of the reference as shown in Register 21-1.
The block diagram is given in Figure 21-1.
The comparator reference supply voltage can come
from either V
DD or VSS, or the external VREF+ and
V
REF- that are multiplexed with RA3 and RA2. The
comparator reference supply voltage is controlled by
the CVRSS bit.
21.1 Configuring the Comparator
Voltage Reference
The comparator voltage reference can output 16 distinct
voltage levels for each range. The equations used to
calculate the output of the comparator voltage reference
are as follows:
If CVRR =
1:
CV
REF = (CVR<3:0>/24) x CVRSRC
If CVRR = 0:
CV
REF = (CVDD x 1/4) + (CVR<3:0>/32) x CVRSRC
The settling time of the comparator voltage reference
must be considered when changing the CV
REF output
(Section 27.0 “Electrical Characteristics”).
REGISTER 21-1: CVRCON REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1 CVR0
bit 7 bit 0
bit 7 CVREN: Comparator Voltage Reference Enable bit
1 =CV
REF circuit powered on
0 =CV
REF circuit powered down
bit 6 CVROE: Comparator V
REF Output Enable bit
(1)
1 =CVREF voltage level is also output on the RF5/AN10/C1IN+/CVREF pin
0 =CV
REF voltage is disconnected from the RF5/AN10/C1IN+/CVREF pin
bit 5 CVRR: Comparator V
REF Range Selection bit
1 = 0.00 CV
RSRC to 0.625 CVRSRC with CVRSRC/24 step size
0 = 0.25 CV
RSRC to 0.71875 CVRSRC with CVRSRC/32 step size
bit 4 CVRSS: Comparator V
REF Source Selection bit
1 = Comparator reference source, CV
RSRC = VREF+ – VREF-
0 = Comparator reference source, CV
RSRC = VDD – VSS
Note: To select (VREF+ – VREF-) as the comparator voltage reference source, the voltage
reference configuration bits in the ADCON1 register (ADCON1<5:4>) must also be
set to ‘11’.
bit 3-0 CVR3:CVR0: Comparator V
REF Value Selection bits (0  VR3:VR0  15)
When CVRR =
1:
CV
REF = (CVR<3:0>/24)  (CVRSRC)
When CVRR =
0:
CV
REF = 1/4  (CVRSRC) + (CVR3:CVR0/32)  (CVRSRC)
Note 1: If enabled for output, RF5 must also be configured as an input by setting TRISF<5>
to ‘1’.
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
18F8680.book Page 265 Tuesday, January 29, 2013 1:32 PM