Datasheet

 2003-2013 Microchip Technology Inc. DS30491D-page 143
PIC18F6585/8585/6680/8680
FIGURE 10-17: RG1/CANTX2 PIN BLOCK DIAGRAM
FIGURE 10-18: RG2/CANRX PIN BLOCK
DIAGRAM
FIGURE 10-19: RG3 PIN BLOCK
DIAGRAM
Data Latch
TRIS Latch
RD TRISG
P
V
SS
Q
D
Q
CK
Q
D
Q
CK
QD
EN
N
VDD
0
1
WR PORTG or
WR TRISG
Data Bus
RD PORTG
I/O pin
0
1
TXD
CANCLK
TX1SRC
ENDRHI
OPMODE2:OPMODE0 = 000
TX2EN
Schmitt
Trigger
RD LATG
WR LATG
OPMODE2:OPMODE0 = 000
Note: I/O pins have diode protection to VDD and VSS.
Data Bus
WR LATG
WR TRISG
RD PORTG
Data Latch
TRIS Latch
RD TRISG
I/O pin
QD
CK
QD
CK
EN
QD
EN
RD LATG
or
WR PORTG
CANRX
Schmitt
Trigger
Input
Buffer
Note: I/O pins have diode protection to V
DD and VSS.
Data Bus
WR LATG
WR TRISG
RD PORTG
Data Latch
TRIS Latch
RD TRISG
Schmitt
Trigger
Input
Buffer
I/O pin
QD
CK
QD
CK
EN
QD
EN
RD LATG
or
WR PORTG
Note: I/O pins have diode protection to V
DD and VSS.
18F8680.book Page 143 Tuesday, January 29, 2013 1:32 PM