Datasheet

 2003-2013 Microchip Technology Inc. DS39609C-page 373
PIC18F6520/8520/6620/8620/6720/8720
with PLL) ............................................................27
Transition Between Timer1 and OSC1 (HS, XT, LP) . 26
Transition Between Timer1 and OSC1 (RC, EC) ....... 27
Transition from OSC1 to Timer1 Oscillator ................ 26
USART Asynchronous Reception ............................207
USART Asynchronous Transmission ....................... 205
USART Asynchronous Transmission (Back to Back) ....
205
USART Synchronous Receive ( Master/Slave) .......337
USART SynchronousTransmission (Master/Slave) . 337
Wake-up from Sleep via Interrupt ............................253
TRISE Register
PSPMODE Bit .................................................. 111, 128
TSTFSZ ...........................................................................299
Two-Word Instructions
Example Cases .......................................................... 46
TXSTA Register
BRGH Bit ................................................................. 200
U
Universal Synchronous Asynchronous Receiver Transmitter.
See USART
USART
Asynchronous Mode ................................................ 204
Associated Registers, Receive ........................ 207
Associated Registers, Transmit ....................... 205
Receiver ...........................................................206
Setting up 9-bit Mode with Address Detect ...... 206
Transmitter .......................................................204
Baud Rate Generator (BRG) .................................... 200
Associated Registers .......................................200
Baud Rate Error, Calculating ........................... 200
Baud Rate Formula ..........................................200
Baud Rates for Asynchronous Mode (BRGH = 0) .
202
Baud Rates for Asynchronous Mode (BRGH = 1) .
203
Baud Rates for Synchronous Mode ................. 201
High Baud Rate Select (BRGH Bit) ................. 200
Sampling ..........................................................200
Serial Port Enable (SPEN Bit) .................................. 197
Synchronous Master Mode ...................................... 208
Associated Registers, Reception ..................... 210
Associated Registers, Transmit ....................... 208
Reception .........................................................210
Transmission ................................................... 208
Synchronous Slave Mode ........................................ 211
Associated Registers, Receive ........................ 212
Associated Registers, Transmit ....................... 211
Reception .........................................................212
Transmission ................................................... 211
USART Synchronous Receive Requirements ................. 337
USART Synchronous Transmission Requirements ......... 337
V
Voltage Reference Specifications ....................................315
W
Wake-up from Sleep ................................................ 239, 252
Using Interrupts ........................................................ 252
Watchdog Timer (WDT) ........................................... 239, 250
Associated Registers ............................................... 251
Control Register .......................................................250
Postscaler ................................................................251
Programming Considerations ..................................250
RC Oscillator ............................................................ 250
Time-out Period ....................................................... 250
WCOL .............................................................................. 185
WCOL Status Flag ................................... 185, 186, 187, 190
WDT Postscaler ............................................................... 250
WWW Address ................................................................ 375
WWW, On-Line Support ...................................................... 5
X
XORLW ........................................................................... 299
XORWF ........................................................................... 300