Datasheet

 2003-2013 Microchip Technology Inc. DS39609C-page 37
PIC18F6520/8520/6620/8620/6720/8720
FIGURE 3-3: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD VIA 1 k RESISTOR)
FIGURE 3-4: TIME-OUT SEQUENCE ON POWER-UP (MCLR
NOT TIED TO VDD): CASE 1
FIGURE 3-5: TIME-OUT SEQUENCE ON POWER-UP (MCLR
NOT TIED TO VDD): CASE 2
TPWRT
TOST
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
TPWRT
TOST
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
TPWRT
TOST