Datasheet

 2003-2013 Microchip Technology Inc. DS39609C-page 327
PIC18F6520/8520/6620/8620/6720/8720
TABLE 26-13: CAPTURE/COMPARE/PWM REQUIREMENTS (ALL CCP MODULES)
FIGURE 26-15: PARALLEL SLAVE PORT TIMING (PIC18F8X20)
Param
No.
Symbol Characteristic Min Max Units Conditions
50 TCCL CCPx Input Low
Time
No prescaler 0.5 TCY + 20 — ns
With
prescaler
PIC18FXX20 10 — ns
PIC18LFXX20 20 — ns
51 T
CCH CCPx Input High
Time
No prescaler 0.5 TCY + 20 — ns
With
prescaler
PIC18FXX20 10 — ns
PIC18LFXX20 20 — ns
52 T
CCP CCPx Input Period 3 TCY + 40
N
— ns N = prescale
value (1, 4 or 16)
53 TCCR CCPx Output Rise Time PIC18FXX20 — 25 ns
PIC18LFXX20 — 45 ns VDD = 2.0V
54 T
CCF CCPx Output Fall Time PIC18FXX20 — 25 ns
PIC18LFXX20 — 45 ns V
DD = 2.0V
Note: Refer to Figure 26-6 for load conditions.
RE2/CS
RE0/RD
RE1/WR
RD7:RD0
62
63
64
65