Datasheet

2003-2013 Microchip Technology Inc. DS39609C-page 243
PIC18F6520/8520/6620/8620/6720/8720
REGISTER 23-6: CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
R/P-1 U-0 U-0 U-0 U-0 R/P-1 U-0 R/P-1
DEBUG
—LVP —STVREN
bit 7 bit 0
bit 7 DEBUG
: Background Debugger Enable bit
1 = Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.
0 = Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.
bit 6-3 Unimplemented: Read as ‘0
bit 2 LVP: Low-Voltage ICSP Enable bit
1 = Low-voltage ICSP enabled
0 = Low-voltage ICSP disabled
bit 1 Unimplemented: Read as ‘0
bit 0 STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack full/underflow will cause Reset
0 = Stack full/underflow will not cause Reset
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’
- n = Value when device is unprogrammed u = Unchanged from programmed state