Datasheet

PIC18F6520/8520/6620/8620/6720/8720
DS39609C-page 240  2003-2013 Microchip Technology Inc.
TABLE 23-1: CONFIGURATION BITS AND DEVICE IDS
REGISTER 23-1: CONFIG1H: CONFIGURATION REGISTER 1 HIGH (BYTE ADDRESS 300001h)
File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Default/
Unprogrammed
Value
300001h CONFIG1H
— —OSCSEN— — FOSC2 FOSC1 FOSC0
--1- -111
300002h CONFIG2L — — — — BORV1 BORV0 BODEN PWRTEN
---- 1111
300003h CONFIG2H — — — — WDTPS2 WDTPS1 WDTPS0 WDTEN
---- 1111
300004h
(1)
CONFIG3L WAIT — — — — —PM1PM0
1--- --11
300005h CONFIG3H — — — — — —r
(3)
CCP2MX
---- --11
300006h CONFIG4L DEBUG — — — —LVP —STVREN
1--- -1-1
300008h CONFIG5L CP7
(2)
CP6
(2)
CP5
(2)
CP4
(2)
CP3 CP2 CP1 CP0
1111 1111
300009h CONFIG5H CPD CPB — — — — — —
11-- ----
30000Ah CONFIG6L WRT7
(2)
WRT6
(2)
WRT5
(2)
WRT4
(2)
WRT3 WRT2 WRT1 WRT0
1111 1111
30000Bh CONFIG6H WRTD WRTB WRTC — — — — —
111- ----
30000Ch CONFIG7L EBTR7
(2)
EBTR6
(2)
EBTR5
(2)
EBTR4
(2)
EBTR3 EBTR2 EBTR1 EBTR0
1111 1111
30000Dh CONFIG7H —EBTRB — — — — — —
-1-- ----
3FFFFEh DEVID1 DEV2 DEV1 DEV0 REV4 REV3 REV2 REV1 REV0 (4)
3FFFFFh DEVID2 DEV10 DEV9 DEV8 DEV7 DEV6 DEV5 DEV4 DEV3
0000 0110
Legend: x = unknown, u = unchanged, – = unimplemented, q = value depends on condition, r = reserved.
Shaded cells are unimplemented, read as ‘0’.
Note 1: Unimplemented in PIC18F6X20 devices; maintain this bit set.
2: Unimplemented in PIC18FX520 and PIC18FX620 devices; maintain this bit set.
3: Unimplemented in PIC18FX620 and PIC18FX720 devices; maintain this bit set.
4: See Register 23-13 for DEVID1 values.
U-0 U-0 R/P-1 U-0 U-0 R/P-1 R/P-1 R/P-1
— — OSCSEN — — FOSC2 FOSC1 FOSC0
bit 7 bit 0
bit 7-6 Unimplemented: Read as ‘0’
bit 5 OSCSEN
: Oscillator System Clock Switch Enable bit
1 = Oscillator system clock switch option is disabled (main oscillator is source)
0 = Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)
bit 4-3 Unimplemented: Read as ‘0’
bit 2-0 FOSC2:FOSC0: Oscillator Selection bits
111 = RC oscillator w/ OSC2 configured as RA6
110 = HS oscillator with PLL enabled; clock frequency = (4 x F
OSC)
101 = EC oscillator w/ OSC2 configured as RA6
100 = EC oscillator w/ OSC2 configured as divide-by-4 clock output
011 = RC oscillator w/ OSC2 configured as divide-by-4 clock output
010 = HS oscillator
001 = XT oscillator
000 = LP oscillator
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’
- n = Value when device is unprogrammed u = Unchanged from programmed state