Datasheet

 2003-2013 Microchip Technology Inc. DS39609C-page 215
PIC18F6520/8520/6620/8620/6720/8720
REGISTER 19-3: ADCON2 REGISTER
The analog reference voltage is software selectable to
either the device’s positive and negative supply voltage
(VDD and VSS), or the voltage level on the RA3/AN3/
V
REF+ pin and RA2/AN2/VREF- pin.
The A/D converter has a unique feature of being able
to operate while the device is in Sleep mode. To oper-
ate in Sleep, the A/D conversion clock must be derived
from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
converter, which generates the result via successive
approximation.
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion is aborted.
Each port pin associated with the A/D converter can be
configured as an analog input (RA3 can also be a
voltage reference), or as a digital I/O. The ADRESH
and ADRESL registers contain the result of the A/D
conversion. When the A/D conversion is complete, the
result is loaded into the ADRESH/ADRESL registers,
the GO/DONE
bit (ADCON0 register) is cleared and
A/D interrupt flag bit, ADIF, is set. The block diagram of
the A/D module is shown in Figure 19-1.
R/W-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
ADFM — — — — ADCS2 ADCS1 ADCS0
bit 7 bit 0
bit 7 ADFM: A/D Result Format Select bit
1 = Right justified
0 = Left justified
bit 6-3 Unimplemented: Read as ‘0’
bit 2-0 ADCS1:ADCS0: A/D Conversion Clock Select bits
000 = F
OSC/2
001 = F
OSC/8
010 = F
OSC/32
011 = F
RC (clock derived from an RC oscillator = 1 MHz max)
100 = F
OSC/4
101 = F
OSC/16
110 = F
OSC/64
111 = F
RC (clock derived from an RC oscillator = 1 MHz max)
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown