Datasheet

PIC18F6520/8520/6620/8620/6720/8720
DS39609C-page 18  2003-2013 Microchip Technology Inc.
PORTG is a bidirectional I/O port.
RG0/CCP3
RG0
CCP3
35
I/O
I/O
ST
ST
Digital I/O.
Capture3 input/Compare3 output/
PWM3 output.
RG1/TX2/CK2
RG1
TX2
CK2
46
I/O
O
I/O
ST
—
ST
Digital I/O.
USART 2 asynchronous transmit.
USART 2 synchronous clock
(see RX2/DT2).
RG2/RX2/DT2
RG2
RX2
DT2
57
I/O
I
I/O
ST
ST
ST
Digital I/O.
USART 2 asynchronous receive.
USART 2 synchronous data
(see TX2/CK2).
RG3/CCP4
RG3
CCP4
68
I/O
I/O
ST
ST
Digital I/O.
Capture4 input/Compare4 output/
PWM4 output.
RG4/CCP5
RG4
CCP5
810
I/O
I/O
ST
ST
Digital I/O.
Capture5 input/Compare5 output/
PWM5 output.
TABLE 1-2: PIC18FXX20 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
PIC18F6X20 PIC18F8X20
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
Note 1: Alternate assignment for CCP2 when CCP2MX is not selected (all operating modes except
Microcontroller).
2: Default assignment when CCP2MX is set.
3: External memory interface functions are only available on PIC18F8X20 devices.
4: CCP2 is multiplexed with this pin by default when configured in Microcontroller mode. Otherwise, it is
multiplexed with either RB3 or RC1.
5: PORTH and PORTJ are only available on PIC18F8X20 (80-pin) devices.
6: AV
DD must be connected to a positive supply and AVSS must be connected to a ground reference for
proper operation of the part in user or ICSP modes. See parameter D001A for details.