Datasheet

 2003-2013 Microchip Technology Inc. DS39609C-page 153
PIC18F6520/8520/6620/8620/6720/8720
TABLE 16-2: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1 AND TIMER3
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
all other
Resets
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 0000 0000 0000
RCON IPEN
— — RI TO PD POR BOR 0--1 11qq 0--q qquu
PIR1
PSPIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
PIE1
PSPIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
IPR1
PSPIP ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 0111 1111 0111 1111
PIR2
— CMIE — EEIE BCLIF LVDIF TMR3IF CCP2IF -0-0 0000 ---0 0000
PIE2
— CMIF — EEIF BCLIE LVDIE TMR3IE CCP2IE -0-0 0000 ---0 0000
IPR2
— CMIP — EEIP BCLIP LVDIP TMR3IP CCP2IP -1-1 1111 ---1 1111
PIR3
— — RC2IF TX2IF TMR4IF CCP5IF CCP4IF CCP3IF --00 0000 --00 0000
PIE3
— — RC2IE TX2IE TMR4IE CCP5IE CCP4IE CCP3IE --00 0000 --00 0000
IPR3
— — RC2IP TX2IP TMR4IP CCP5IP CCP4IP CCP3IP --11 1111 --11 1111
TRISC PORTC Data Direction Register 1111 1111 1111 1111
TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register xxxx xxxx uuuu uuuu
TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register xxxx xxxx uuuu uuuu
T1CON RD16
— T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0-00 0000 u-uu uuuu
TMR3H Timer3 Register High Byte xxxx xxxx uuuu uuuu
TMR3L Timer3 Register Low Byte xxxx xxxx uuuu uuuu
T3CON RD16 T3CCP2 T3CKPS1 T3CKPS0 T3CCP1 T3SYNC
TMR3CS TMR3ON 0000 0000 uuuu uuuu
CCPRxL
(1)
Capture/Compare/PWM Register x (LSB) xxxx xxxx uuuu uuuu
CCPRxH
(1)
Capture/Compare/PWM Register x (MSB) xxxx xxxx uuuu uuuu
CCPxCON
(1)
— — DCxB1 DCxB0 CCPxM3 CCPxM2 CCPxM1 CCPxM0 --00 0000 --00 0000
Legend: x = unknown, u = unchanged, – = unimplemented, read as
‘0’.
Shaded cells are not used by Capture and Compare, Timer1 or Timer3.
Note 1: Generic term for all of the identical registers of this name for all CCP modules, where ‘x’ identifies the individual module
(CCP1 through CCP5). Bit assignments and Reset values for all registers of the same generic name are identical.