Datasheet
2003-2013 Microchip Technology Inc. DS39609C-page 123
PIC18F6520/8520/6620/8620/6720/8720
FIGURE 10-19: RH3:RH0 PINS BLOCK DIAGRAM IN SYSTEM BUS MODE
To Instruction Register
External Enable
Address Out
Drive System
System Bus
Control
Data Bus
WR LATH
WR TRISH
RD PORTH
Data Latch
TRIS Latch
RD TRISH
TTL
Input
Buffer
I/O pin
(1)
QD
CK
QD
CK
EN
QD
EN
RD LATD
or
PORTH
0
1
Port
Data
Instruction Read
Note 1: I/O pins have diode protection to VDD and VSS.