Datasheet
PIC18F6520/8520/6620/8620/6720/8720
DS39609C-page 116 2003-2013 Microchip Technology Inc.
TABLE 10-9: PORTE FUNCTIONS
TABLE 10-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Name Bit# Buffer Type Function
RE0/RD/AD8 bit 0 ST/TTL
(1)
Input/output port pin, read control for Parallel Slave Port or
address/data bit 8
For RD
(PSP Control mode):
1 = Not a read operation
0 = Read operation, reads PORTD register (if chip selected)
RE1/WR
/AD9 bit 1 ST/TTL
(1)
Input/output port pin, write control for Parallel Slave Port or
address/data bit 9
For WR (PSP Control mode):
1 = Not a write operation
0 = Write operation, writes PORTD register (if chip selected)
RE2/CS
/AD10 bit 2 ST/TTL
(1)
Input/output port pin, chip select control for Parallel Slave Port or
address/data bit 10
For CS (PSP Control mode):
1 = Device is not selected
0 = Device is selected
RE3/AD11 bit 3 ST/TTL
(1)
Input/output port pin or address/data bit 11.
RE4/AD12 bit 4 ST/TTL
(1)
Input/output port pin or address/data bit 12.
RE5/AD13 bit 5 ST/TTL
(1)
Input/output port pin or address/data bit 13.
RE6/AD14 bit 6 ST/TTL
(1)
Input/output port pin or address/data bit 14.
RE7/CCP2/AD15 bit 7 ST/TTL
(1)
Input/output port pin, Capture2 input/Compare2 output/PWM output
(PIC18F8X20 devices in Microcontroller mode only) or
address/data bit 15.
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O or CCP mode and TTL buffers when in System Bus or PSP
Control mode.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
all other
Resets
TRISE PORTE Data Direction Control Register 1111 1111 1111 1111
PORTE Read PORTE pin/Write PORTE Data Latch xxxx xxxx uuuu uuuu
LATE Read PORTE Data Latch/Write PORTE Data Latch xxxx xxxx uuuu uuuu
MEMCON EBDIS
— WAIT1 WAIT0 — — WM1 WM0 0-00 --00 0000 --00
PSPCON
IBF OBF IBOV PSPMODE — — — — 0000 ---- 0000 ----
Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTE.