Datasheet

 2003-2013 Microchip Technology Inc. DS39609C-page 115
PIC18F6520/8520/6620/8620/6720/8720
FIGURE 10-11: PORTE BLOCK DIAGRAM IN I/O MODE
FIGURE 10-12: PORTE BLOCK DIAGRAM IN SYSTEM BUS MODE
Peripheral Out Select
Data Bus
WR LATE
WR TRISE
Data Latch
TRIS Latch
RD TRISE
QD
Q
CK
QD
EN
Peripheral Data Out
0
1
QD
Q
CK
P
N
V
DD
VSS
RD PORTE
Peripheral Data In
I/O pin
(1)
or WR PORTE
RD LATE
Schmitt
Trigger
Note 1: I/O pins have diode protection to V
DD and VSS.
TRIS
Override
Peripheral Enable
TRIS OVERRIDE
Pin Override Peripheral
RE0 Yes External Bus
RE1 Yes External Bus
RE2 Yes External Bus
RE3 Yes External Bus
RE4 Yes External Bus
RE5 Yes External Bus
RE6 Yes External Bus
RE7 Yes External Bus
Instruction Register
Bus Enable
Data/TRIS Out
Drive Bus
System Bus
Control
Data Bus
WR LATE
WR TRISE
RD PORTE
Data Latch
TRIS Latch
RD TRISE
TTL
Input
Buffer
I/O pin
(1)
QD
CK
QD
CK
EN
QD
EN
RD LATE
or PORTE
0
1
Port
Data
Instruction Read
Note 1: I/O pins have protection diodes to VDD and VSS.