Datasheet

 2003-2013 Microchip Technology Inc. DS39609C-page 101
PIC18F6520/8520/6620/8620/6720/8720
9.5 RCON Register
The RCON register contains the IPEN bit, which is
used to enable prioritized interrupts. The functions of
the other bits in this register are discussed in more
detail in Section 4.14 “RCON Register”.
REGISTER 9-13: RCON REGISTER
R/W-0 U-0 U-0 R/W-1 R-1 R-1 R/W-0 R/W-0
IPEN
— —RITO PD POR BOR
bit 7 bit 0
bit 7 IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16 Compatibility mode)
bit 6-5 Unimplemented: Read as ‘0’
bit 4 RI
: RESET Instruction Flag bit
For details of bit operation, see Register 4-4.
bit 3 TO: Watchdog Time-out Flag bit
For details of bit operation, see Register 4-4.
bit 2 PD: Power-Down Detection Flag bit
For details of bit operation, see Register 4-4.
bit 1 POR: Power-on Reset Status bit
For details of bit operation, see Register 4-4.
bit 0 BOR: Brown-out Reset Status bit
For details of bit operation, see Register 4-4.
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown