Datasheet

PIC18F6390/6490/8390/8490

LCDSE5 6X90 8X90 0000 0000 0000 0000

(6)

uuuu uuuu

LCDSE4 6X90 8X90 0000 0000 0000 0000

(6)

uuuu uuuu

LCDSE3 6X90 8X90 0000 0000 0000 0000

(6)

uuuu uuuu

LCDSE2 6X90 8X90 0000 0000 0000 0000

(6)

uuuu uuuu

LCDSE1 6X90 8X90 0000 0000 0000 0000

(6)

uuuu uuuu

LCDSE0 6X90 8X90 0000 0000 0000 0000

(6)

uuuu uuuu

LCDCON 6X90 8X90 000- 0000 000- 0000 uuu- uuuu

LCDPS 6X90 8X90 0000 0000 0000 0000 uuuu uuuu

TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Applicable

Devices

Power-on Reset,

Brown-out Reset

MCLR

Resets

WDT Reset

RESET Instruction

Stack Resets

Wake-up via WDT

or Interrupt

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

4: See Table 4-3 for Reset value for specific condition.

5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When

not enabled as PORTA pins, they are disabled and read ‘0’.

6: These registers are cleared on POR and unchanged on BOR.