Datasheet

© 2007 Microchip Technology Inc. DS39629C-page 63
PIC18F6390/6490/8390/8490
LCDDATA23 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA22 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA21 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA20 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA19 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA18 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA17
6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA16 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA15 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA14 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA13 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA12 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA11
6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
SPBRG2 6X90 8X90 0000 0000 0000 0000 uuuu uuuu
RCREG2 6X90 8X90 0000 0000 0000 0000 uuuu uuuu
TXREG2 6X90 8X90 0000 0000 0000 0000 uuuu uuuu
TXSTA2 6X90 8X90 0000 -010 0000 -010 uuuu -uuu
RCSTA2 6X90 8X90 0000 000x 0000 000x uuuu uuuu
LCDDATA10
6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA9 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA8 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA7 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA6 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA5
6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA4 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA3 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA2 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA1 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
LCDDATA0 6X90 8X90 xxxx xxxx 0000 0000 uuuu uuuu
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable
Devices
Power-on Reset,
Brown-out Reset
MCLR
Resets
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 4-3 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read ‘0’.
6: These registers are cleared on POR and unchanged on BOR.