Datasheet

PIC18F6390/6490/8390/8490
DS39629C-page 292 © 2007 Microchip Technology Inc.
23.5 Program Verification and
Code Protection
The overall structure of the code protection on the
PIC18F6390/6490/8390/8490 Flash devices differs
from previous PIC18 devices.
For all devices in the PIC18F6X90/8X90 family, the
user program memory is made of a single block.
Figure 23-5 shows the program memory organization
for individual devices. Code protection for this block is
controlled by a single bit, CP (CONFIG5L<0>). The CP
bit inhibits external reads from and writes to the entire
program memory space. It has no direct effect in
normal execution mode.
23.5.1 READING PROGRAM MEMORY
AND OTHER LOCATIONS
The program memory may be read to any location
using the table read instructions. The Device ID and the
Configuration registers may be read with the table read
instructions.
23.5.2 CONFIGURATION REGISTER
PROTECTION
The Configuration registers can only be written via
ICSP using an external programmer. No separate
protection bit is associated with them.
FIGURE 23-5: CODE-PROTECTED PROGRAM MEMORY FOR PIC18F6390/6490/8390/8490
TABLE 23-3: SUMMARY OF CODE PROTECTION REGISTERS
MEMORY SIZE/DEVICE
Block Code Protection
Controlled By:
8Kbytes
(PIC18F6390/8390)
Address
Range
16 Kbytes
(PIC18F6490/8490)
Address
Range
Program Memory
Block
000000h
001FFFh
Program Memory
Block
000000h
003FFFh
CP, EBTR
Unimplemented
Read ‘0’s
002000h
1FFFFFh
Unimplemented
Read ‘0’s
004000h
1FFFFFh
(Unimplemented Memory Space)
File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
300008h CONFIG5L
— — — — — — —CP
Legend: Shaded cells are unimplemented.