Datasheet

© 2007 Microchip Technology Inc. DS39629C-page 285
PIC18F6390/6490/8390/8490
REGISTER 23-5: CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
R/P-1 R/P-0 U-0 U-0 U-0 U-0 U-0 R/P-1
DEBUG
XINST — — — — —STVREN
bit 7 bit 0
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed u = Unchanged from programmed state
bit 7 DEBUG
: Background Debugger Enable bit
1 = Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins
0 = Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug
bit 6 XINST: Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode enabled
0 = Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
bit 5-1 Unimplemented: Read as ‘0’
bit 0 STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack full/underflow will cause Reset
0 = Stack full/underflow will not cause Reset
REGISTER 23-6: CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)
U-0 U-0 U-0 U-0 U-0 U-0 U-0 R/C-1
— — — — — — —CP
bit 7 bit 0
Legend:
R = Readable bit C = Clearable bit U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed u = Unchanged from programmed state
bit 7-1 Unimplemented: Read as ‘0’
bit 0 CP: Code Protection bit
1 = Program memory block (000000-003FFFh) not code-protected
0 = Program memory block (000000-003FFFh) code-protected