Datasheet

PIC18F6390/6490/8390/8490
DS39629C-page 260 © 2007 Microchip Technology Inc.
The LCDSE5:LCDSE0 registers configure the
functions of the port pins. Setting the segment enable
bit for a particular segment configures that pin as an
LCD driver. There are six LCD Segment Enable
registers listed in Table 22-1. The prototype LCDSEx
register is shown in Register 22-3.
TABLE 22-1: LCDSE REGISTERS AND
ASSOCIATED SEGMENTS
.
Once the module is initialized for the LCD panel, the
individual bits of the LCDDATA23:LCDDATA0 registers
are cleared or set to represent a clear or dark pixel,
respectively. Specific sets of LCDDATA registers are
used with specific segments and common signals.
Each bit represents a unique combination of a specific
segment connected to a specific common. Individual
LCDDATA bits are named by the convention “SxxCy”,
with “xx” as the segment number and “y” as the
common number. The relationship is summarized in
Table 22-2. The prototype LCDDATAx register is
shown in Register 22-4.
Register Segments
LCDSE0 7:0
LCDSE1 15:8
LCDSE2 23:16
LCDSE3 31:24
LCDSE4 39:32
LCDSE5 47:40
Note: The LCDSE5:LCDSE4 registers are not
implemented in PIC18F6X90 devices.
Note: Writing into the registers, LCDDATA4,
LCDDATA5, LCDDATA10, LCDDATA11,
LCDDATA16, LCDDATA17, LCDDATA22
and LCDDATA23, in PIC18F6X90 devices
will not affect the status of any pixel and
these registers can be used as General
Purpose Registers.
REGISTER 22-3: LCDSEx: LCD SEGMENTx ENABLE REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
SE(n + 7) SE(n + 6) SE(n + 5) SE(n + 4) SE(n + 3) SE(n + 2) SE(n + 1) SE(n)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 SE(n + 7):SE(n): Segment Enable bits
For LCDSE0: n = 0
For LCDSE1: n = 8
For LCDSE2: n = 16
For LCDSE3: n = 24
For LCDSE4: n = 32
For LCDSE5: n = 40
1 = Segment function of the pin is enabled, digital I/O is disabled
0 = I/O function of the pin is enabled