Datasheet

© 2007 Microchip Technology Inc. DS39629C-page 255
PIC18F6390/6490/8390/8490
21.6 Operation During Sleep
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
21.7 Effects of a Reset
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
TABLE 21-1: REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
HLVDCON VDIRMAG
— IRVST HLVDEN HLVDL3 HLVDL2 HLVDL1 HLVDL0 60
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 59
PIR2
OSCFIF CMIF — — BCLIF HLVDIF TMR3IF CCP2IF 61
PIE2
OSCFIE CMIE — — BCLIE HLVDIE TMR3IE CCP2IE 61
IPR2 OSCFIP CMIP — — BCLIP HLVDIP TMR3IP CCP2IP 61
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.