Datasheet

© 2007 Microchip Technology Inc. DS39629C-page 213
PIC18F6390/6490/8390/8490
FIGURE 16-12: SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
TABLE 16-7: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
RC7/RX1/DT1 pin
RC6/TX1/CK1 pin
Write to
TXREG1 Reg
TX1IF bit
TRMT bit
bit 0
bit 1
bit 2
bit 6 bit 7
TXEN bit
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 59
PIR1 — ADIF RC1IF TX1IF SSPIF CCP1IF TMR2IF TMR1IF 61
PIE1
— ADIE RC1IE TX1IE SSPIE CCP1IE TMR2IE TMR1IE 61
IPR1 — ADIP RC1IP TX1IP SSPIP CCP1IP TMR2IP TMR1IP 61
RCSTA1 SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 61
TXREG1 EUSART1 Transmit Register 61
TXSTA1 CSRC TX9 TXEN SYNC
SENDB BRGH TRMT TX9D 61
BAUDCON1 ABDOVF RCIDL —SCKPBRG16— WUE ABDEN 62
SPBRGH1 EUSART1 Baud Rate Generator Register High Byte 62
SPBRG1 EUSART1 Baud Rate Generator Register Low Byte 61
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master transmission.