Datasheet

PIC18F6390/6490/8390/8490

9.9 PORTJ, TRISJ and

LATJ Registers

PORTJ is an 8-bit wide, bidirectional port. The corre-

sponding Data Direction register is TRISJ. Setting a

TRISJ bit (= 1) will make the corresponding PORTJ pin

an input (i.e., put the corresponding output driver in a

high-impedance mode). Clearing a TRISJ bit (= 0) will

make the corresponding PORTJ pin an output (i.e., put

the contents of the output latch on the selected pin).

The Data Latch register (LATJ) is also memory

mapped. Read-modify-write operations on the LATJ

PORTJ.

All pins on PORTJ are implemented with Schmitt

Trigger input buffers. Each pin is individually

configurable as an input or output.

PORTJ is also multiplexed with LCD segment drives

controlled by the LCDSE4 register. I/O port functions

are only available when the segments are disabled.

EXAMPLE 9-9: INITIALIZING PORTJ

Note: PORTJ is available only on 80-pin devices.

Note: On a Power-on Reset, these pins are

configured as digital inputs.

CLRF PORTJ ; Initialize PORTG by

; clearing output

; data latches

CLRF LATJ ; Alternate method

; to clear output

; data latches

MOVLW 0xCF ; Value used to

; initialize data

; direction

MOVWF TRISJ ; Set RJ3:RJ0 as inputs

; RJ5:RJ4 as output

; RJ7:RJ6 as inputs