Information
Table Of Contents
- TABLE 1: Silicon DEVREV Values
- TABLE 2: Silicon Issue Summary
- Silicon Errata Issues
- 1. Module: Analog-to-Digital Converter (A/D)
- 2. Module: Ports
- 3. Module: High/Low Voltage Detect (HLVD)
- 4. Module: ECCP
- 5. Module: EUSART
- 6. Module: Ipd and Idd
- 7. Module: Ultra Low-Power Sleep
- 8. Module: Resets (BOR)
- 9. Module: RG5 Pin
- 10. Module: Primary Oscillator (XT Mode)
- Data Sheet Clarifications
- 1. Module: Electrical Characteristics
- 2. Module: Voltage Regulator Pins (ENVREG and Vcap/Vddcore)
- 3. Module: DC Characteristics (Injection Current)
- 4. Module: DC Characteristics (Input Low Voltage and Input High Voltage)
- Appendix A: Document Revision History
- Trademarks
- Worldwide Sales

PIC18F87K90 FAMILY
DS80000500F-page 4 2010-2013 Microchip Technology Inc.
Affected Silicon Revisions
TABLE 3: A/D CONVERTER CHARACTERISTICS
Param.
No.
Sym. Characteristic Min. Typ. Max. Units Conditions
A01 N
R Resolution — — 12 bit VREF 5.0V
A03 EIL Integral Linearity Error — — ±10.0 LSb VREF 5.0V
A04 EDL Differential Linearity Error — — +6.0/-4.0 LSb VREF 5.0V
A06 E
OFF Offset Error — — ±25 LSb VREF 5.0V,
Temperature: 25°C
——±30LSbV
REF 5.0V,
Temperature: 85°C, -40°C
A07 E
GN Gain Error — — ±15 LSb VREF 5.0V
A10 — Monotonicity
(1)
—VSS VAIN VREF
A20 VREF Reference Voltage Range
(V
REFH – VREFL)
3—AV
DD – AVSS V
A21 V
REFH Reference Voltage High AVSS + 3.0V — AVDD + 0.3V V
A22 V
REFL Reference Voltage Low AVSS – 0.3V — AVDD – 3.0V V
A25 VAIN Analog Input Voltage VREFL —VREFH V
Note 1: The A/D conversion result never decreases with an increase in the input voltage.
A1 B1 B3 C1 C3
X
X X X