Datasheet
PIC18F87J11 FAMILY
DS39778E-page 66 2007-2012 Microchip Technology Inc.
PMADDRH PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMDOUT1H PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMADDRL PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMDOUT1L PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMDIN1H PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMDIN1L PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMCONH PIC18F6XJ1X PIC18F8XJ1X 0-00 0000 0-00 0000 u-uu uuuu
PMCONL PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMMODEH PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMMODEL PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMDOUT2H PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMDOUT2L PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMDIN2H PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMDIN2L PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMEH PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMEL PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
PMSTATH PIC18F6XJ1X PIC18F8XJ1X 00-- 0000 00-- 0000 uu-- uuuu
PMSTATL PIC18F6XJ1X PIC18F8XJ1X 10-- 1111 10-- 1111 uu-- uuuu
TABLE 5-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS
(4)
(CONTINUED)
Register Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR
Resets,
WDT Reset,
RESET Instruction,
Stack Resets,
CM Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be effected (to cause wake-up).
4: See Table 5 -2 for Reset value for specific conditions.