Datasheet

PIC18F87J11 FAMILY
DS39778E-page 64 2007-2012 Microchip Technology Inc.
IPR3 PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
PIR3 PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
(3)
PIE3 PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
IPR2 PIC18F6XJ1X PIC18F8XJ1X 111- 1111 111- 1111 uuu- uuuu
PIR2 PIC18F6XJ1X PIC18F8XJ1X 000- 0000 000- 0000 uuu- uuuu
(3)
PIE2 PIC18F6XJ1X PIC18F8XJ1X 000- 0000 000- 0000 uuu- uuuu
IPR1 PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
PIR1 PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
(3)
PIE1 PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
RCSTA2 PIC18F6XJ1X PIC18F8XJ1X 0000 000x 0000 000x uuuu uuuu
OSCTUNE PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
TRISJ
PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
TRISH PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
TRISG PIC18F6XJ1X PIC18F8XJ1X ---1 1111 ---1 1111 ---u uuuu
TRISF PIC18F6XJ1X PIC18F8XJ1X 1111 111- 1111 111- uuuu uuu-
TRISE PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
TRISD PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
TRISC PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
TRISB PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
TRISA PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
LATJ
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
LATH PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
LATG PIC18F6XJ1X PIC18F8XJ1X ---x xxxx ---u uuuu ---u uuuu
LATF PIC18F6XJ1X PIC18F8XJ1X xxxx xxx- uuuu uuu- uuuu uuu-
LATE PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
LATD PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
LATC PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
LATB PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
LATA PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
TABLE 5-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS
(4)
(CONTINUED)
Register Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR
Resets,
WDT Reset,
RESET Instruction,
Stack Resets,
CM Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be effected (to cause wake-up).
4: See Table 5 -2 for Reset value for specific conditions.