Datasheet

PIC18F87J11 FAMILY
DS39778E-page 28  2007-2012 Microchip Technology Inc.
PORTH is a bidirectional I/O port.
RH0/A16
RH0
A16
79
I/O
O
ST
TTL
Digital I/O.
External Memory Address/Data 16.
RH1/A17
RH1
A17
80
I/O
O
ST
TTL
Digital I/O.
External Memory Address/Data 17.
RH2/A18/PMD7
RH2
A18
PMD7
(7)
1
I/O
O
I/O
ST
TTL
TTL
Digital I/O.
External Memory Address/Data 18.
Parallel Master Port data.
RH3/A19/PMD6
RH3
A19
PMD6
(7)
2
I/O
O
I/O
ST
TTL
TTL
Digital I/O.
External Memory Address/Data 19.
Parallel Master Port data.
RH4/PMD3/AN12/
P3C/C2INC
RH4
PMD3
(7)
AN12
P3C
(5)
C2INC
22
I/O
I/O
I
O
I
ST
TTL
Analog
—
Analog
Digital I/O.
Parallel Master Port address.
Analog Input 12.
ECCP3 PWM Output C.
Comparator 2 Input C.
RH5/PMBE/AN13/
P3B/C2IND
RH5
PMBE
(7)
AN13
P3B
(5)
C2IND
21
I/O
O
I
O
I
ST
—
Analog
—
Analog
Digital I/O.
Parallel Master Port byte enable.
Analog Input 13.
ECCP3 PWM Output B.
Comparator 2 Input D.
RH6/PMRD/AN14/
P1C/C1INC
RH6
PMRD
(7)
AN14
P1C
(5)
C1INC
20
I/O
I/O
I
O
I
ST
—
Analog
—
Analog
Digital I/O.
Parallel Master Port read strobe.
Analog Input 14.
ECCP1 PWM Output C.
Comparator 1 Input C.
RH7/PMWR/AN15/P1B
RH7
PMWR
(7)
AN15
P1B
(5)
19
I/O
I/O
I
O
ST
—
Analog
—
Digital I/O.
Parallel Master Port write strobe.
Analog Input 15.
ECCP1 PWM Output B.
TABLE 1-4: PIC18F8XJ1X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
80-TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
I
2
C = ST with I
2
C™ or SMB levels
Note 1: Alternate assignment for ECCP2/P2A when Configuration bit, CCP2MX, is cleared (Extended Microcontroller mode).
2: Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX is set).
3: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
4: Alternate assignment for ECCP2/P2A when CCP2MX is cleared (Microcontroller mode).
5: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
6: Default assignment for PMP data and control pins when PMPMX Configuration bit is set.
7: Alternate assignment for PMP data and control pins when PMPMX Configuration bit is cleared (programmed).